Tena Sánchez, Erica

Perfil en ORCID: 0000-0002-8905-5715

Perfil en ResearcherID: G-4808-2015

Perfil en Scopus: 55614010800\

Grupos de Investigación

• DISEÑO DE CIRCUITOS INTEGRADOS DIGITALES Y MIXTOS

Responsable de los siguientes proyectos/ayudas en la US

Participa los siguientes proyectos/ayudas en la US

Proyectos:

• Integración y Validación en Laboratorio de Contramedidas Frente a Ataques Laterales en Criptocircuitos Microelectrónicos ( TEC2016-80549-R - Investigador/a).
• Cesar: Circuitos Microelectrónicos Seguros Frente a Ataques Laterales ( TEC2013-45523-R - Investigador/a).

Publicaciones

Capítulo de Libros:

• Tena-Sánchez, Erica, Potestad, Francisco Eugenio, Parra-Fernández, María Del Pilar, Baena-Oliva, Maria Carmen, Valencia-Barrero, Manuel, Jimenez-Fernandez, Carlos Jesus, Acosta-Jimenez, Antonio Jose:
  DESIGN AND SECURITY EVALUATION OF SECURE CRYPTOHARDWARE (FPGA AND ASIC) AGAINST HACKERS EXPLOITING SIDE-CHANNEL INFORMATION DESIGN AND SECURITY EVALUA. Pag. 47 - 50. En: SINERGIAS EN LA INVESTIGACIÓN EN STEM. 3ciencias (www.3ciencias.com). 2022. ISBN 978-84-123872-6-1 DOI: https://doi.org/10

Publicaciones en Revistas:

• Tena-Sánchez, Erica, Potestad, Francisco Eugenio, Jimenez-Fernandez, Carlos Jesus, Acosta-Jimenez, Antonio Jose, Chaves, Ricardo:
  Gate-Level Hardware Countermeasure Comparison against Power Analysis Attacks. En: Applied Sciences. 2022. Vol. 12. Núm. 5. Pag. 2390- 10.3390/app12052390
• Potestad, Francisco Eugenio, Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose, Jimenez-Fernandez, Carlos Jesus, Chaves, Ricardo:
  Hardware Countermeasures Benchmarking against Fault Attacks. En: Applied Sciences. 2022. Vol. 12. Núm. 5. Pag. 2443- 10.3390/app12052443
• Delgado -lozano, Ignacio M, Acosta-Jimenez, Antonio Jose, Tena-Sánchez, Erica, Nuñez-Martínez, Juan:
  Gate-Level Design Methodology for Side-Channel Resistant Logic Styles Using TFETs. En: IEEE Embedded Systems Letters. 2022. Vol. 14. Núm. 2. Pag. 99-102 10.1109/LES.2021.3122395
• Potestad, Francisco Eugenio, Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose, Jimenez-Fernandez, Carlos Jesus, Chaves, Ricardo:
  Design and Evaluation of Countermeasures Against Fault Injection Attacks and Power Side-Channel Leakage Exploration for AES Block Cipher. En: IEEE Access. 2022. Vol. 10. Núm. . Pag. 65548-65561 10.1109/ACCESS.2022.3183764
• Delgado-lozano, Ignacio M., Tena-Sánchez, Erica, Nuñez-Martínez, Juan, Acosta-Jimenez, Antonio Jose:
  Design and analysis of secure emerging crypto-hardware using HyperFET devices. En: IEEE Transactions on Emerging Topics in Computing. 2020. Vol. Online. Núm. . Pag. - 10.1109/TETC.2020.2977735
• Delgado-lozano, I. M., Tena-Sánchez, Erica, Nuñez-Martínez, Juan, Acosta-Jimenez, Antonio Jose:
  Projection of dual-rail DPA countermeasures in future FinFET and emerging TFET technologies. En: ACM Journal on Emerging Technologies in Computing Systems. 2020. Vol. 16. Núm. 3. Pag. 1-16 10.1145/3381857
• Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose:
  Logic minimization and wide fan-in issues in DPL-based cryptocircuits against power analysis attacks. En: International Journal of Circuit Theory and Applications. 2019. Vol. 47. Núm. 2. Pag. 238-253
• Acosta-Jimenez, Antonio Jose, Addabbo, Tommaso, Tena-Sánchez, Erica:
  Embedded electronic circuits for cryptography, hardware security and true random number generation: an overview. En: International Journal of Circuit Theory and Applications. 2017. Vol. 45. Núm. 2. Pag. 145-167 10.1002/cta.2296
• Acosta-Jimenez, Antonio Jose, Tena-Sánchez, Erica, Jimenez-Fernandez, Carlos Jesus, Mora-Gutierrez, Jose Miguel:
  Power and Energy Issues on Lightweight Cryptography. En: Journal of low power electronics. 2017. Vol. 13. Núm. 3. Pag. 326-337 10.1166/jolpe.2017.1490
• Brox-Jimenez, Piedad, Martínez-Rodríguez, Macarena Cristina, Tena-Sánchez, Erica, Baturone-Castillo, Iluminada, Acosta-Jimenez, Antonio Jose:
  Application specific integrated circuit solution for multi-input multi-output piecewise-affine functions. En: International Journal of Circuit Theory and Applications. 2016. Vol. 44. Núm. 1. Pag. 4-20 10.1002/cta.2058
• Tena-Sánchez, Erica, Castro-Ramirez, Javier, Acosta-Jimenez, Antonio Jose:
  A Methodology for Optimized Design of Secure Differential Logic Gates for DPA Resistant Circuits. En: IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2014. Vol. 4. Núm. 2. Pag. 203-215 10.1109/JETCAS.2014.2315878
• Brox-Jimenez, Piedad, Castro-Ramirez, Javier, Martínez-Rodríguez, Macarena Cristina, Tena-Sánchez, Erica, Jimenez-Fernandez, Carlos Jesus, Baturone-Castillo, Iluminada, Acosta-Jimenez, Antonio Jose:
  A Programmable and Configurable ASIC to Generate Piecewise-Affine Functions Defined Over General Partitions. En: IEEE Transactions on Circuits and Systems. Part 1: Regular Papers. 2013. Vol. 60. Núm. 12. Pag. 3182-3194 10.1109/TCSI.2013.2265962

Aportaciones a Congresos:

• Potestad, Francisco Eugenio, Jimenez-Fernandez, Carlos Jesus, Gallardo, Alejandro, Valencia-Barrero, Manuel, Baena-Oliva, Maria Carmen, Parra-Fernández, María Del Pilar, Tena-Sánchez, Erica:
  ICs tester design and its effect on application in electronics laboratories. Comunicación en congreso. 2022 Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica (XV Technologies Applied to Electronics Teaching Conference). Escuela Universitaria Politecnica, Universidad de Zaragoza, Teruel. 2022
• Jimenez-Fernandez, Carlos Jesus, Baena-Oliva, Maria Carmen, Parra-Fernández, María Del Pilar, Valencia-Barrero, Manuel, Potestad, Francisco Eugenio, Tena-Sánchez, Erica, Gallardo, Alejandro:
  Teaching based on proposed by students designs: a case study. Comunicación en congreso. 2022 Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica (XV Technologies Applied to Electronics Teaching Conference). Escuela Universitaria Politecnica, Universidad de Zaragoza, Teruel. 2022
• Potestad, Francisco Eugenio, Tena-Sánchez, Erica, Chaves, Ricardo, Valencia-Barrero, Manuel, Acosta-Jimenez, Antonio Jose, Jimenez-Fernandez, Carlos Jesus:
  Hamming-code based fault detection desing methodology for block ciphers. Ponencia en Congreso. IEEE International Symposium on Circuits and Systems (ISCAS). , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Facultad de Ciencias Económicas y Empresariales. Universidad de Sevilla. 2020
• Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose:
  Effect of temperature variation in experimental DPA and DEMA attacks. Poster en Congreso. International Workshop on Power and Timing Modeling, Optimization and Simulation. Costa Brava (Spain). 2018
• Tena-Sánchez, Erica, Delgado-lozano, Ignacio M., Nuñez-Martínez, Juan, Acosta-Jimenez, Antonio Jose:
  Benchmarking of nanometer technologies for DPA-resilient DPL-based cryptocircuits. Comunicación en congreso. XXXIII CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS . - Lyon, Francia, Francia. 2018
• Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose, Nuñez-Martínez, Juan:
  Secure Cryptographic Hardware Implementation Issues for High-Performance Applications. Poster en Congreso. 26th International Workshop Power and Timing Modeling, Optimization and Simulation (PATMOS). BREMEN, ALEMANIA. 2016
• Canas-moreno, Salvador, Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose:
  A low-cost FPGA-based platform to perform fast Power/Electromagnetic Attacks on cryptographic circuits. Conferencia Congreso no publicada. XXXI Design of Circuits and Integrated Systems Conference. Granada. 2016
• Tena-Sánchez, Erica, Durán-menor De Gaspar, Irene, Canas-moreno, Salvador, Acosta-Jimenez, Antonio Jose:
  Vulnerability Evaluation and Secure Design Methodology of Cryptohardware for ASIC-embedded Secure Applications to Prevent Side-Channel Attacks. Conferencia Congreso no publicada. Workshop on Trustworthy Manufacturing and Utilization of Secure Devices TRUDEVICE 2016. . Barcelona. 2016
• Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose:
  Optimized DPA attack on Trivium stream cipher using correlation shape distinguishers. Comunicación en congreso. DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. ESTORIL (PORTUGAL). 2015
• Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose:
  DPA Vulnerability Analysis on Trivium Stream Cipher using an Optimized Power Model. Comunicación en congreso. 2015 IEEE International Symposium on Circuits and Systems (ISCAS),. Lisboa-Portugal. 2015
• Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose:
  Design and Characterization of Cryptohardware for ASIC-embedded Secure Applications to Prevent Power Analysis Attacks. Conferencia Congreso no publicada. 17th International Workshop on Cryptographic Hardware and Embedded Systems. Saint Malo, Francia. 2015
• Tena-Sánchez, Erica:
  Cryptohardware design for ASIC-embedded secure applications. Conferencia Congreso no publicada. International Workshop on Cryptography, Robustness, and Provably Secure Schemes for Female Young Researchers . NIJMEGEN. 2015
• Martínez-Rodríguez, Macarena Cristina, Brox-Jimenez, Piedad, Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose, Baturone-Castillo, Iluminada:
  Programmable ASICs for model predictive control. Comunicación en congreso. IEEE INTERNATIONAL CONFERENCE ON INDUSTRIAL TECHNOLOGIES 2015. Sevilla (Spain). 2015
• Tena-Sánchez, Erica, Castro-Ramirez, Javier, Acosta-Jimenez, Antonio Jose:
  Design and Test of a Low-Power 90nm Xor/Xnor Gate for Cryptographic Applications. Comunicación en congreso. International Workshop On Power And Timing Modeling, Optimization And Simulations. Palma de Mallorca. 2014
• Tena-Sánchez, Erica, Castro-Ramirez, Javier, Acosta-Jimenez, Antonio Jose:
  Low-Power Differential Logic Gates for DPA Resistant Circuits. Poster en Congreso. Euromicro Conference on Digital System Design. Verona. 2014
• Tena-Sánchez, Erica, Castro-Ramirez, Javier, Acosta-Jimenez, Antonio Jose:
  Automatic and Systematic Control of Experimental Data Measurements on ASICs. Comunicación en congreso. 19th Symposium IMEKO TC 4 Symposium. Barcelona, - BARCELONA, ESPAÑA. 2013
• Tena-Sánchez, Erica, Castro-Ramirez, Javier, Acosta-Jimenez, Antonio Jose:
  Automatic and Systematic Test Toolset for Digital ASICs. Comunicación en congreso. DCIS 2013. Donostia - San Sebastián (España). 2013
• EIROA-LORENZO, SUSANA, Castro-Ramirez, Javier, Martínez-Rodríguez, Macarena Cristina, Tena-Sánchez, Erica, Brox-Jimenez, Piedad, Baturone-Castillo, Iluminada:
  Reducing bit flipping problems in SRAM physical unclonable functions for chip identification. Comunicación en congreso. 19th International Conference on Electronics, Circuits and Systems. SEVILLE (SPAIN). 2012
• Martínez-Rodríguez, Macarena Cristina, Brox-Jimenez, Piedad, Castro-Ramirez, Javier, Tena-Sánchez, Erica, Acosta-Jimenez, Antonio Jose, Baturone-Castillo, Iluminada:
  ASIC-in-the-loop methodology for verification of piecewise affine controllers. Comunicación en congreso. 19th International Conference on Electronics, Circuits and Systems. SEVILLE (SPAIN). 2012